000 | 03834nam a22005055i 4500 | ||
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001 | 978-3-031-01721-6 | ||
003 | DE-He213 | ||
005 | 20240730163651.0 | ||
007 | cr nn 008mamaa | ||
008 | 220601s2008 sz | s |||| 0|eng d | ||
020 |
_a9783031017216 _9978-3-031-01721-6 |
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024 | 7 |
_a10.1007/978-3-031-01721-6 _2doi |
|
050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
072 | 7 |
_aTJFC _2thema |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aKaxiras, Stefanos. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _979823 |
|
245 | 1 | 0 |
_aComputer Architecture Techniques for Power-Efficiency _h[electronic resource] / _cby Stefanos Kaxiras, Margaret Martonosi. |
250 | _a1st ed. 2008. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2008. |
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300 |
_aXI, 207 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 |
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505 | 0 | _aIntroduction -- Modeling, Simulation, and Measurement -- Using Voltage and Frequency Adjustments to Manage Dynamic Power -- Optimizing Capacitance and Switching Activity to Reduce Dynamic Power -- Managing Static (Leakage) Power -- Conclusions. | |
520 | _aIn the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions. | ||
650 | 0 |
_aElectronic circuits. _919581 |
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650 | 0 |
_aMicroprocessors. _979824 |
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650 | 0 |
_aComputer architecture. _93513 |
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650 | 1 | 4 |
_aElectronic Circuits and Systems. _979825 |
650 | 2 | 4 |
_aProcessor Architectures. _979826 |
700 | 1 |
_aMartonosi, Margaret. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _979827 |
|
710 | 2 |
_aSpringerLink (Online service) _979828 |
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773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783031005930 |
776 | 0 | 8 |
_iPrinted edition: _z9783031028496 |
830 | 0 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 _979829 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-031-01721-6 |
912 | _aZDB-2-SXSC | ||
942 | _cEBK | ||
999 |
_c84856 _d84856 |