000 04107nam a22005895i 4500
001 978-3-031-02030-8
003 DE-He213
005 20240730163757.0
007 cr nn 008mamaa
008 220601s2016 sz | s |||| 0|eng d
020 _a9783031020308
_9978-3-031-02030-8
024 7 _a10.1007/978-3-031-02030-8
_2doi
050 4 _aT1-995
072 7 _aTBC
_2bicssc
072 7 _aTEC000000
_2bisacsh
072 7 _aTBC
_2thema
082 0 4 _a620
_223
100 1 _aYu, Shimeng.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_980516
245 1 0 _aResistive Random Access Memory (RRAM)
_h[electronic resource] /
_cby Shimeng Yu.
250 _a1st ed. 2016.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2016.
300 _aVII, 71 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSynthesis Lectures on Emerging Engineering Technologies,
_x2381-1439
505 0 _aIntroduction to RRAM Technology -- RRAM Device Fabrication and Performances -- RRAM Characterization and Modeling -- RRAM Array Architecture -- Outlook for RRAM's Applications -- Bibliography -- Author Biography.
520 _aRRAM technology has made significant progress in the past decade as a competitive candidate for the next generation non-volatile memory (NVM). This lecture is a comprehensive tutorial of metal oxide-based RRAM technology from device fabrication to array architecture design. State-of-the-art RRAM device performances, characterization, and modeling techniques are summarized, and the design considerations of the RRAM integration to large-scale array with peripheral circuits are discussed. Chapter 2 introduces the RRAM device fabrication techniques and methods to eliminate the forming process, and will show its scalability down to sub-10 nm regime. Then the device performances such as programming speed, variability control, and multi-level operation are presented, and finally the reliability issues such as cycling endurance and data retention are discussed. Chapter 3 discusses the RRAM physical mechanism, and the materials characterization techniques to observe the conductive filaments andthe electrical characterization techniques to study the electronic conduction processes. It also presents the numerical device modeling techniques for simulating the evolution of the conductive filaments as well as the compact device modeling techniques for circuit-level design. Chapter 4 discusses the two common RRAM array architectures for large-scale integration: one-transistor-one-resistor (1T1R) and cross-point architecture with selector. The write/read schemes are presented and the peripheral circuitry design considerations are discussed. Finally, a 3D integration approach is introduced for building ultra-high density RRAM array. Chapter 5 is a brief summary and will give an outlook for RRAM's potential novel applications beyond the NVM applications.
650 0 _aEngineering.
_99405
650 0 _aElectrical engineering.
_980517
650 0 _aElectronic circuits.
_919581
650 0 _aComputers.
_98172
650 0 _aMaterials science.
_95803
650 0 _aSurfaces (Technology).
_910743
650 0 _aThin films.
_97674
650 1 4 _aTechnology and Engineering.
_980518
650 2 4 _aElectrical and Electronic Engineering.
_980519
650 2 4 _aElectronic Circuits and Systems.
_980520
650 2 4 _aComputer Hardware.
_933420
650 2 4 _aMaterials Science.
_95803
650 2 4 _aSurfaces, Interfaces and Thin Film.
_931793
710 2 _aSpringerLink (Online service)
_980521
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783031009020
776 0 8 _iPrinted edition:
_z9783031031588
830 0 _aSynthesis Lectures on Emerging Engineering Technologies,
_x2381-1439
_980522
856 4 0 _uhttps://doi.org/10.1007/978-3-031-02030-8
912 _aZDB-2-SXSC
942 _cEBK
999 _c84974
_d84974