000 03682nam a22005055i 4500
001 978-3-031-01738-4
003 DE-He213
005 20240730164110.0
007 cr nn 008mamaa
008 220601s2013 sz | s |||| 0|eng d
020 _a9783031017384
_9978-3-031-01738-4
024 7 _a10.1007/978-3-031-01738-4
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aNemirovsky, Mario.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_982109
245 1 0 _aMultithreading Architecture
_h[electronic resource] /
_cby Mario Nemirovsky, Dean Tullsen.
250 _a1st ed. 2013.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2013.
300 _aXIV, 98 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
505 0 _aIntroduction -- Multithreaded Execution Models -- Coarse-Grain Multithreading -- Fine-Grain Multithreading -- Simultaneous Multithreading -- Managing Contention -- New Opportunities for Multithreaded Processors -- Experimentation and Metrics -- Implementations of Multithreaded Processors -- Conclusion.
520 _aMultithreaded architectures now appear across the entire range of computing devices, from the highest-performing general purpose devices to low-end embedded processors. Multithreading enables a processor core to more effectively utilize its computational resources, as a stall in one thread need not cause execution resources to be idle. This enables the computer architect to maximize performance within area constraints, power constraints, or energy constraints. However, the architectural options for the processor designer or architect looking to implement multithreading are quite extensive and varied, as evidenced not only by the research literature but also by the variety of commercial implementations. This book introduces the basic concepts of multithreading, describes a number of models of multithreading, and then develops the three classic models (coarse-grain, fine-grain, and simultaneous multithreading) in greater detail. It describes a wide variety of architectural and software design tradeoffs, as well as opportunities specific to multithreading architectures. Finally, it details a number of important commercial and academic hardware implementations of multithreading. Table of Contents: Introduction / Multithreaded Execution Models / Coarse-Grain Multithreading / Fine-Grain Multithreading / Simultaneous Multithreading / Managing Contention / New Opportunities for Multithreaded Processors / Experimentation and Metrics / Implementations of Multithreaded Processors / Conclusion.
650 0 _aElectronic circuits.
_919581
650 0 _aMicroprocessors.
_982110
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_982111
650 2 4 _aProcessor Architectures.
_982112
700 1 _aTullsen, Dean.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_982113
710 2 _aSpringerLink (Online service)
_982114
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783031006104
776 0 8 _iPrinted edition:
_z9783031028663
830 0 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
_982115
856 4 0 _uhttps://doi.org/10.1007/978-3-031-01738-4
912 _aZDB-2-SXSC
942 _cEBK
999 _c85299
_d85299