000 04277nam a22005055i 4500
001 978-3-031-01760-5
003 DE-He213
005 20240730164111.0
007 cr nn 008mamaa
008 220601s2019 sz | s |||| 0|eng d
020 _a9783031017605
_9978-3-031-01760-5
024 7 _a10.1007/978-3-031-01760-5
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aSzefer, Jakub.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_982122
245 1 0 _aPrinciples of Secure Processor Architecture Design
_h[electronic resource] /
_cby Jakub Szefer.
250 _a1st ed. 2019.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2019.
300 _aXXII, 154 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
505 0 _aPreface -- Acknowledgments -- Introduction -- Basic Computer Security Concepts -- Secure Processor Architectures -- Trusted Execution Environments -- Hardware Root of Trust -- Memory Protections -- Multiprocessor and Many-Core Protections -- Side-Channel Threats and Protections -- Security Verification of Processor Architectures -- Principles of Secure Processor Architecture Design -- Bibliography -- Online Resources -- Author's Biography.
520 _aWith growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book aims to give readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered). This book aims to present the different challenges of secure processor architecture design to graduate students interested in research on architecture and hardware security and computer architects working in industry interested in adding security features to their designs. It aims to educate readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, this book presents numerous design suggestions, as well as discusses pitfalls and fallacies that designers should avoid.
650 0 _aElectronic circuits.
_919581
650 0 _aMicroprocessors.
_982123
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_982124
650 2 4 _aProcessor Architectures.
_982125
710 2 _aSpringerLink (Online service)
_982126
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783031000577
776 0 8 _iPrinted edition:
_z9783031006326
776 0 8 _iPrinted edition:
_z9783031028885
830 0 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
_982127
856 4 0 _uhttps://doi.org/10.1007/978-3-031-01760-5
912 _aZDB-2-SXSC
942 _cEBK
999 _c85301
_d85301