| 000 | 03668nam a22005055i 4500 | ||
|---|---|---|---|
| 001 | 978-3-031-01739-1 | ||
| 003 | DE-He213 | ||
| 005 | 20240730164220.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220601s2013 sz | s |||| 0|eng d | ||
| 020 |
_a9783031017391 _9978-3-031-01739-1 |
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| 024 | 7 |
_a10.1007/978-3-031-01739-1 _2doi |
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| 050 | 4 | _aTK7867-7867.5 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
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| 072 | 7 |
_aTJFC _2thema |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aReddi, Vijay Janapa. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _983004 |
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| 245 | 1 | 0 |
_aResilient Architecture Design for Voltage Variation _h[electronic resource] / _cby Vijay Janapa Reddi, Meeta Sharma Gupta. |
| 250 | _a1st ed. 2013. | ||
| 264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2013. |
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| 300 |
_aXVI, 124 p. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 490 | 1 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 |
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| 505 | 0 | _aIntroduction -- Modeling Voltage Variation -- Understanding the Characteristics of Voltage Variation -- Traditional Solutions and Emerging Solution Forecast -- Allowing and Tolerating Voltage Emergencies -- Predicting and Avoiding Voltage Emergencies -- Eliminiating Recurring Voltage Emergencies -- Future Directions on Resiliency. | |
| 520 | _aShrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructsthat can serve as a basis for addressing other reliability challenges as well. Table of Contents: Introduction / Modeling Voltage Variation / Understanding the Characteristics of Voltage Variation / Traditional Solutions and Emerging Solution Forecast / Allowing and Tolerating Voltage Emergencies / Predicting and Avoiding Voltage Emergencies / Eliminiating Recurring Voltage Emergencies / Future Directions on Resiliency. | ||
| 650 | 0 |
_aElectronic circuits. _919581 |
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| 650 | 0 |
_aMicroprocessors. _983005 |
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| 650 | 0 |
_aComputer architecture. _93513 |
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| 650 | 1 | 4 |
_aElectronic Circuits and Systems. _983006 |
| 650 | 2 | 4 |
_aProcessor Architectures. _983008 |
| 700 | 1 |
_aGupta, Meeta Sharma. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _983009 |
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| 710 | 2 |
_aSpringerLink (Online service) _983010 |
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| 773 | 0 | _tSpringer Nature eBook | |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031006111 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031028670 |
| 830 | 0 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 _983012 |
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| 856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-031-01739-1 |
| 912 | _aZDB-2-SXSC | ||
| 942 | _cEBK | ||
| 999 |
_c85440 _d85440 |
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