000 03584nam a22005415i 4500
001 978-3-031-01748-3
003 DE-He213
005 20240730164222.0
007 cr nn 008mamaa
008 220601s2015 sz | s |||| 0|eng d
020 _a9783031017483
_9978-3-031-01748-3
024 7 _a10.1007/978-3-031-01748-3
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aChen, Yu-Ting.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983023
245 1 0 _aCustomizable Computing
_h[electronic resource] /
_cby Yu-Ting Chen, Jason Cong, Michael Gill, Glenn Reinman, Bingjun Xiao.
250 _a1st ed. 2015.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2015.
300 _aXI, 106 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
505 0 _aAcknowledgments -- Introduction -- Road Map -- Customization of Cores -- Loosely Coupled Compute Engines -- On-Chip Memory Customization -- Interconnect Customization -- Concluding Remarks -- Bibliography -- Authors' Biographies .
520 _aSince the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.
650 0 _aElectronic circuits.
_919581
650 0 _aMicroprocessors.
_983025
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_983029
650 2 4 _aProcessor Architectures.
_983030
700 1 _aCong, Jason.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983032
700 1 _aGill, Michael.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983034
700 1 _aReinman, Glenn.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983035
700 1 _aXiao, Bingjun.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983036
710 2 _aSpringerLink (Online service)
_983037
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783031006203
776 0 8 _iPrinted edition:
_z9783031028762
830 0 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
_983038
856 4 0 _uhttps://doi.org/10.1007/978-3-031-01748-3
912 _aZDB-2-SXSC
942 _cEBK
999 _c85444
_d85444