000 04996nam a22005055i 4500
001 978-3-031-01769-8
003 DE-He213
005 20240730164225.0
007 cr nn 008mamaa
008 220601s2021 sz | s |||| 0|eng d
020 _a9783031017698
_9978-3-031-01769-8
024 7 _a10.1007/978-3-031-01769-8
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aRodriguez, Andres.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_983097
245 1 0 _aDeep Learning Systems
_h[electronic resource] :
_bAlgorithms, Compilers, and Processors for Large-Scale Production /
_cby Andres Rodriguez.
250 _a1st ed. 2021.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2021.
300 _aXX, 245 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
505 0 _aPreface -- Acknowledgments -- Introduction -- Building Blocks -- Models and Applications -- Training a Model -- Distributed Training -- Reducing the Model Size -- Hardware -- Compiler Optimizations -- Frameworks and Compilers -- Opportunities and Challenges -- Bibliography -- Author's Biography.
520 _aThis book describes deep learning systems: the algorithms, compilers, and processor components to efficiently train and deploy deep learning models for commercial applications. The exponential growth in computational power is slowing at a time when the amount of compute consumed by state-of-the-art deep learning (DL) workloads is rapidly growing. Model size, serving latency, and power constraints are a significant challenge in the deployment of DL models for many applications. Therefore, it is imperative to codesign algorithms, compilers, and hardware to accelerate advances in this field with holistic system-level and algorithm solutions that improve performance, power, and efficiency. Advancing DL systems generally involves three types of engineers: (1) data scientists that utilize and develop DL algorithms in partnership with domain experts, such as medical, economic, or climate scientists; (2) hardware designers that develop specialized hardware to accelerate the components in the DL models; and (3) performance and compiler engineers that optimize software to run more efficiently on a given hardware. Hardware engineers should be aware of the characteristics and components of production and academic models likely to be adopted by industry to guide design decisions impacting future hardware. Data scientists should be aware of deployment platform constraints when designing models. Performance engineers should support optimizations across diverse models, libraries, and hardware targets. The purpose of this book is to provide a solid understanding of (1) the design, training, and applications of DL algorithms in industry; (2) the compiler techniques to map deep learning code to hardware targets; and (3) the critical hardware features that accelerate DL systems. This book aims to facilitate co-innovation for the advancement of DL systems. It is written for engineers working in one or more of these areas who seek to understand the entire system stack in order to bettercollaborate with engineers working in other parts of the system stack. The book details advancements and adoption of DL models in industry, explains the training and deployment process, describes the essential hardware architectural features needed for today's and future models, and details advances in DL compilers to efficiently execute algorithms across various hardware targets. Unique in this book is the holistic exposition of the entire DL system stack, the emphasis on commercial applications, and the practical techniques to design models and accelerate their performance. The author is fortunate to work with hardware, software, data scientist, and research teams across many high-technology companies with hyperscale data centers. These companies employ many of the examples and methods provided throughout the book.
650 0 _aElectronic circuits.
_919581
650 0 _aMicroprocessors.
_983099
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_983101
650 2 4 _aProcessor Architectures.
_983103
710 2 _aSpringerLink (Online service)
_983105
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783031000669
776 0 8 _iPrinted edition:
_z9783031006418
776 0 8 _iPrinted edition:
_z9783031028977
830 0 _aSynthesis Lectures on Computer Architecture,
_x1935-3243
_983106
856 4 0 _uhttps://doi.org/10.1007/978-3-031-01769-8
912 _aZDB-2-SXSC
942 _cEBK
999 _c85453
_d85453