| 000 | 02941nam a22005055i 4500 | ||
|---|---|---|---|
| 001 | 978-3-031-01747-6 | ||
| 003 | DE-He213 | ||
| 005 | 20240730164355.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220601s2015 sz | s |||| 0|eng d | ||
| 020 |
_a9783031017476 _9978-3-031-01747-6 |
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| 024 | 7 |
_a10.1007/978-3-031-01747-6 _2doi |
|
| 050 | 4 | _aTK7867-7867.5 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 072 | 7 |
_aTJFC _2thema |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aXie, Yuan. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _984170 |
|
| 245 | 1 | 0 |
_aDie-stacking Architecture _h[electronic resource] / _cby Yuan Xie, Jishen Zhao. |
| 250 | _a1st ed. 2015. | ||
| 264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2015. |
|
| 300 |
_aXIV, 113 p. _bonline resource. |
||
| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
||
| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
||
| 490 | 1 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 |
|
| 505 | 0 | _aPreface -- Acknowledgments -- 3D Integration Technology -- Benefits of 3D Integration -- Fine-granularity 3D Processor Design -- Coarse-granularity 3D Processor Design -- 3D GPU Architecture -- 3D Network-on-Chip -- Thermal Analysis and Thermal-aware Design -- Cost Analysis for 3D ICs -- Conclusion -- Bibliography . | |
| 520 | _aThe emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology. | ||
| 650 | 0 |
_aElectronic circuits. _919581 |
|
| 650 | 0 |
_aMicroprocessors. _984171 |
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| 650 | 0 |
_aComputer architecture. _93513 |
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| 650 | 1 | 4 |
_aElectronic Circuits and Systems. _984172 |
| 650 | 2 | 4 |
_aProcessor Architectures. _984174 |
| 700 | 1 |
_aZhao, Jishen. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _984175 |
|
| 710 | 2 |
_aSpringerLink (Online service) _984178 |
|
| 773 | 0 | _tSpringer Nature eBook | |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031006197 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031028755 |
| 830 | 0 |
_aSynthesis Lectures on Computer Architecture, _x1935-3243 _984180 |
|
| 856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-031-01747-6 |
| 912 | _aZDB-2-SXSC | ||
| 942 | _cEBK | ||
| 999 |
_c85628 _d85628 |
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