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008 100324s2006 gw | s |||| 0|eng d
020 _a9783540472384
_9978-3-540-47238-4
024 7 _a10.1007/11901914
_2doi
050 4 _aTA345-345.5
072 7 _aUGC
_2bicssc
072 7 _aCOM007000
_2bisacsh
072 7 _aUGC
_2thema
082 0 4 _a670.285
_223
245 1 0 _aAutomated Technology for Verification and Analysis
_h[electronic resource] :
_b4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006, Proceedings /
_cedited by Susanne Graf, Wenhui Zhang.
250 _a1st ed. 2006.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2006.
300 _aXIV, 546 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aProgramming and Software Engineering,
_x2945-9168 ;
_v4218
505 0 _aKeynote Speeches -- Analysis of Recursive Probabilistic Models -- Verification Challenges and Opportunities in the New Era of Microprocessor Design -- Automated Abstraction of Software -- Regular Papers -- Symmetry Reduction for Probabilistic Model Checking Using Generic Representatives -- Eager Markov Chains -- A Probabilistic Learning Approach for Counterexample Guided Abstraction Refinement -- A Fine-Grained Fullness-Guided Chaining Heuristic for Symbolic Reachability Analysis -- Model Checking Timed Systems with Urgencies -- Whodunit? Causal Analysis for Counterexamples -- On the Membership Problem for Visibly Pushdown Languages -- On the Construction of Fine Automata for Safety Properties -- On the Succinctness of Nondeterminism -- Efficient Algorithms for Alternating Pushdown Systems with an Application to the Computation of Certificate Chains -- Compositional Reasoning for Hardware/Software Co-verification -- Learning-Based Symbolic Assume-Guarantee Reasoning with Automatic Decomposition -- On the Satisfiability of Modular Arithmetic Formulae -- Selective Approaches for Solving Weak Games -- Controller Synthesis and Ordinal Automata -- Effective Contraction of Timed STGs for Decomposition Based Timed Circuit Synthesis -- Synthesis for Probabilistic Environments -- Branching-Time Property Preservation Between Real-Time Systems -- Automatic Verification of Hybrid Systems with Large Discrete State Space -- Timed Unfoldings for Networks of Timed Automata -- Symbolic Unfoldings for Networks of Timed Automata -- Ranked Predicate Abstraction for Branching Time: Complete, Incremental, and Precise -- Timed Temporal Logics for Abstracting Transient States -- Predicate Abstraction of Programs with Non-linear Computation -- A Fresh Look at Testing for Asynchronous Communication -- Proactive Leader Election in Asynchronous Shared Memory Systems -- A Semantic Framework for Test Coverage -- Monotonic Set-Extended Prefix Rewriting and Verification of Recursive Ping-Pong Protocols -- Analyzing Security Protocols in Hierarchical Networks -- Functional Analysis of a Real-Time Protocol for Networked Control Systems -- Symbolic Semantics for the Verification of Security Properties of Mobile Petri Nets -- Sigref - A Symbolic Bisimulation Tool Box -- Towards a Model-Checker for Counter Systems -- The Implementation of Mazurkiewicz Traces in POEM -- Model-Based Tool-Chain Infrastructure for Automated Analysis of Embedded Systems.
520 _aThe Automated Technology for Veri?cation and Analysis (ATVA) international symposium series was initiated in 2003, responding to a growing interest in formal veri?cation spurred by the booming IT industry, particularly hardware design and manufacturing in East Asia. Its purpose is to promote research on automated veri?cation and analysis in the region by providing a forum for int- action between the regional and the international research/industrial commu- ties of the ?eld. ATVA 2006, the fourth of the ATVA series, was held in Beijing, China, October 23-26, 2006. The main topics of the symposium include th- ries useful for providing designers with automated support for obtaining correct software or hardware systems, as well as the implementation of such theories in tools or their application. This year, we received a record number of papers: a total of 137 submissions from 27 countries. Each submission was assigned to three Program Comm- tee members, who could request help from subreviewers, for rigorous and fair evaluation. The ?nal deliberation by the Program Committee was conducted through Springer's Online Conference Service for a duration of about 10 days after nearly all review reports had been collected. In the end, 35 papers were selected for inclusion in the program. ATVA 2006 had three keynote speeches given respectively by Thomas Ball, Jin Yang, and Mihalis Yannakakis. The main symposium was preceded by a tutorial day, consisting of three two-hourlectures given by the keynotespeakers.
650 0 _aComputer-aided engineering.
_914016
650 0 _aComputer science.
_99832
650 0 _aComputer networks .
_931572
650 0 _aComputers, Special purpose.
_946653
650 0 _aSoftware engineering.
_94138
650 1 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
_931735
650 2 4 _aComputer Science Logic and Foundations of Programming.
_942203
650 2 4 _aComputer Communication Networks.
_9148105
650 2 4 _aSpecial Purpose and Application-Based Systems.
_946654
650 2 4 _aSoftware Engineering.
_94138
700 1 _aGraf, Susanne.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9148106
700 1 _aZhang, Wenhui.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9148107
710 2 _aSpringerLink (Online service)
_9148108
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540472377
776 0 8 _iPrinted edition:
_z9783540831846
830 0 _aProgramming and Software Engineering,
_x2945-9168 ;
_v4218
_9148109
856 4 0 _uhttps://doi.org/10.1007/11901914
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