Design Concepts for a Virtualizable Embedded MPSoC Architecture (Record no. 51395)
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fixed length control field | 03332nam a22004815i 4500 |
001 - CONTROL NUMBER | |
control field | 978-3-658-08047-1 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20200420220212.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 141110s2014 gw | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9783658080471 |
-- | 978-3-658-08047-1 |
082 04 - CLASSIFICATION NUMBER | |
Call Number | 004 |
100 1# - AUTHOR NAME | |
Author | Biedermann, Alexander. |
245 10 - TITLE STATEMENT | |
Title | Design Concepts for a Virtualizable Embedded MPSoC Architecture |
Sub Title | Enabling Virtualization in Embedded Multi-Processor Systems / |
300 ## - PHYSICAL DESCRIPTION | |
Number of Pages | XXVI, 208 p. 125 illus. |
505 0# - FORMATTED CONTENTS NOTE | |
Remark 2 | The "Nulticore" Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook. |
520 ## - SUMMARY, ETC. | |
Summary, etc | Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universit�at Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss. |
856 40 - ELECTRONIC LOCATION AND ACCESS | |
Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-658-08047-1 |
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Koha item type | eBooks |
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-- | Wiesbaden : |
-- | Springer Fachmedien Wiesbaden : |
-- | Imprint: Springer Vieweg, |
-- | 2014. |
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-- | Computer science. |
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-- | Computer hardware. |
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-- | Computer organization. |
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-- | Software engineering. |
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-- | Computer Science. |
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-- | Computer Hardware. |
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-- | Computer Systems Organization and Communication Networks. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Software Engineering/Programming and Operating Systems. |
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