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Design Concepts for a Virtualizable Embedded MPSoC Architecture [electronic resource] : Enabling Virtualization in Embedded Multi-Processor Systems / by Alexander Biedermann.

By: Biedermann, Alexander [author.].
Contributor(s): SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: Wiesbaden : Springer Fachmedien Wiesbaden : Imprint: Springer Vieweg, 2014Description: XXVI, 208 p. 125 illus. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783658080471.Subject(s): Computer science | Computer hardware | Computer organization | Software engineering | Computer Science | Computer Hardware | Computer Systems Organization and Communication Networks | Software Engineering/Programming and Operating SystemsAdditional physical formats: Printed edition:: No titleDDC classification: 004 Online resources: Click here to access online
Contents:
The "Nulticore" Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook.
In: Springer eBooksSummary: Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universit�at Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.
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The "Nulticore" Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook.

Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universit�at Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.

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