Microarchitecture of Network-on-Chip Routers (Record no. 56458)

000 -LEADER
fixed length control field 03570nam a22005055i 4500
001 - CONTROL NUMBER
control field 978-1-4614-4301-8
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421112038.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140827s2015 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781461443018
-- 978-1-4614-4301-8
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Dimitrakopoulos, Giorgos.
245 10 - TITLE STATEMENT
Title Microarchitecture of Network-on-Chip Routers
Sub Title A Designer's Perspective /
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIV, 175 p. 134 illus., 77 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction to network-on-chip design -- Link-level flow control and buffering -- Baseline switching modules and routers -- Arbitration logic -- Pipelined wormhole routers -- Virtual-channel flow control and buffering -- Baseline virtual-channel based switching modules and routers -- High-speed allocators for VC-based routers -- Pipelined virtual-channel-based routers.
520 ## - SUMMARY, ETC.
Summary, etc This book focuses on the microarchitecture of network-on-chip routers from a designer's perspective, providing ready-to-use solutions for simple and more sophisticated design cases. All aspects of the design of a network-on-chip router, including flow control, buffering architectures, arbitration and allocation, as well as pipelined organizations, are presented in detail. The authors provide numerous detailed examples and practical abstract models, when necessary. Router micro-architectural options are presented in a step-by-step manner, beginning from basic design principles. Even highly sophisticated design alternatives are categorized and broken down to simpler pieces that can be understood easily and analyzed. This book is an invaluable reference for system, architecture, circuit, and EDA researchers and developers, who are interested in understanding the overall picture of network-on-chip routers' microarchitecture, the associated design challenges, and the available solutions.  � Covers all aspects of the microarchitecture of Network-on-Chip routers; � Justifies and explains every design choice that is presented in a ready-to-use manner following a designer's perspective; � Describes performance-enhancing features in a step-by-step manner; �Includes detailed examples presenting the flow of information inside the router on a cycle-by-cycle basis, highlighting the operation of each part under regular or worst-case traffic scenarios.
700 1# - AUTHOR 2
Author 2 Psarras, Anastasios.
700 1# - AUTHOR 2
Author 2 Seitanidis, Ioannis.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4614-4301-8
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2015.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microelectronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
912 ## -
-- ZDB-2-ENG

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