Designing TSVs for 3D Integrated Circuits (Record no. 57031)

000 -LEADER
fixed length control field 03149nam a22005175i 4500
001 - CONTROL NUMBER
control field 978-1-4614-5508-0
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421112048.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 120922s2013 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781461455080
-- 978-1-4614-5508-0
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Khan, Nauman.
245 10 - TITLE STATEMENT
Title Designing TSVs for 3D Integrated Circuits
300 ## - PHYSICAL DESCRIPTION
Number of Pages X, 76 p. 34 illus., 29 illus. in color.
490 1# - SERIES STATEMENT
Series statement SpringerBriefs in Electrical and Computer Engineering,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Background -- Analysis and Mitigation of TSV-Induced Substrate Noise -- TSVs for Power Delivery -- Early Estimation of TSV Area for Power Delivery in 3-D ICs -- Carbon Nanotubes for Advancing TSV Technology -- Conclusions and Future Directions.
520 ## - SUMMARY, ETC.
Summary, etc This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits.  It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks.  Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.
700 1# - AUTHOR 2
Author 2 Hassoun, Soha.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4614-5508-0
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2013.
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-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microelectronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 2191-8112
912 ## -
-- ZDB-2-ENG

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