Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Record no. 57457)

000 -LEADER
fixed length control field 03019nam a22004815i 4500
001 - CONTROL NUMBER
control field 978-94-007-3958-1
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421112222.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 130321s2013 ne | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9789400739581
-- 978-94-007-3958-1
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Ogras, Umit Y.
245 10 - TITLE STATEMENT
Title Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIV, 174 p.
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Electrical Engineering,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Literature Survey -- Motivational Example: MPEG-2 Encoder Design -- Target NoC Platform -- NoCPerformance Analysis -- Application-specific NoC Architecture Custimization using Long-range Links -- Analysis and Optimization of Prediction-based Flow Control in Networks-on-Chip -- Design and Management of VFI Partition Networks-on-Chip -- Conclusion -- Bibliography -- Appendix A. Tools and FPGA prototype -- Appendix B. Experiments using the Single-chip Cloud Computer (SCC) Platform.
520 ## - SUMMARY, ETC.
Summary, etc Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.
700 1# - AUTHOR 2
Author 2 Marculescu, Radu.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-94-007-3958-1
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
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-- Dordrecht :
-- Springer Netherlands :
-- Imprint: Springer,
-- 2013.
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-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
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-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1876-1100 ;
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-- ZDB-2-ENG

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