Crosstalk in Modern On-Chip Interconnects [electronic resource] : A FDTD Approach / by B.K. Kaushik, V. Ramesh Kumar, Amalendu Patnaik.
By: Kaushik, B.K [author.].
Contributor(s): Kumar, V. Ramesh [author.] | Patnaik, Amalendu [author.] | SpringerLink (Online service).
Material type: BookSeries: SpringerBriefs in Applied Sciences and Technology: Publisher: Singapore : Springer Nature Singapore : Imprint: Springer, 2016Edition: 1st ed. 2016.Description: XV, 116 p. 71 illus. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9789811008009.Subject(s): Microtechnology | Microelectromechanical systems | Electronics | Electronic circuits | Microsystems and MEMS | Electronics and Microelectronics, Instrumentation | Electronic Circuits and SystemsAdditional physical formats: Printed edition:: No title; Printed edition:: No titleDDC classification: 621.381 Online resources: Click here to access onlineIntroduction to On-chip Interconnects and Modeling -- Interconnect Modeling, CNT and GNR Structure, Properties and Characteristics -- FDTD Model for Crosstalk Analysis of CMOS Gate-Driven Coupled Copper Interconnects -- FDTD Model for Crosstalk Analysis of Multiwall Carbon Nanotube (MWCNT) Interconnects -- Crosstalk Modeling with Width Dependent MFP in MLGNR Interconnects Using FDTD Technique -- An Efficient US-FDTD Model for Crosstalk Analysis of On-chip Interconnects.
The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the MLGNR while taking into account the edge roughness.
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